Make And Target

comp.unix.questions Date: Sun, 30 Sep 2001 21:18:41 GMT

> i wanted to know how to make a makefile which will compile all the .cc files

Here is an example for GNU-make (which could often be found in /usr/local/bin):

--- cut here ---

SRCS= $(wildcard *.cc)
OBJS = $(patsubst %.cc,%.o,$(SRCS))

all: $(OBJS)

--- cut here ---

Newsgroups: comp.unix.questions,gnu.utils.help
Date: 29 Sep 2001 20:35:19 -0300

> This is from my make file. I'm wondering if there is any way to
> simplify it, so that I don't have to repeat myself 3 times...
>
> - - >8 - -
> %.htm: %.pm
>        pod2html --infile=$< --outfile=$@
>        rm pod2html-*
>
> %.htm: %.pl
>        pod2html --infile=$< --outfile=$@
>        rm pod2html-*
>
> %.htm: %.pod
>        pod2html --infile=$< --outfile=$@
>        rm pod2html-*
> - - >8 - -
>
> I want to make a generic Makefile so that .htm file can be
> generated from either .pm, .pl or .pod file, depending on which file
> actually exists...

define pod2html-rule
        pod2html --infile=$< --outfile=$@
        rm pod2html-*
endef

%.htm: %.pm
        $(pod2html-rule)
%.htm: %.pl
        $(pod2hmtl-rule)
%.htm: %.pod
        $(pod2html-rule)

(Jonathan Kamens)