Make target examples 

compile all the .cc 

comp.unix.questions Date: Sun, 30 Sep 2001 21:18:41 GMT

> i wanted to know how to make a makefile which will compile all the .cc files

Here is an example for GNU-make (which could often be found in /usr/local/bin):

--- cut here ---
SRCS= $(wildcard *.cc)
OBJS = $(patsubst %.cc,%.o,$(SRCS))
all: $(OBJS)
--- cut here ---

Generic Makefile rules 

Newsgroups: comp.unix.questions,gnu.utils.help
Date: 29 Sep 2001 20:35:19 -0300
> This is from my make file. I'm wondering if there is any way to
> simplify it, so that I don't have to repeat myself 3 times...
>
> - - >8 - -
> %.htm: %.pm
>        pod2html --infile=$< --outfile=$@
>        rm pod2html-*
>
> %.htm: %.pl
>        pod2html --infile=$< --outfile=$@
>        rm pod2html-*
>
> %.htm: %.pod
>        pod2html --infile=$< --outfile=$@
>        rm pod2html-*
> - - >8 - -
>
> I want to make a generic Makefile so that .htm file can be
> generated from either .pm, .pl or .pod file, depending on which file
> actually exists...
define pod2html-rule
        pod2html --infile=$< --outfile=$@
        rm pod2html-*
endef
%.htm: %.pm
        $(pod2html-rule)
%.htm: %.pl
        $(pod2hmtl-rule)
%.htm: %.pod
        $(pod2html-rule)

(Jonathan Kamens)

How to create "universal" makefile? 

Newsgroups: gnu.gcc.help,comp.os.linux.misc
Date: Thu, 13 Mar 2003 18:58:36 -0500
> On my UNIX box I create simple and not so simple c++ programs which use only
> standard library. Each program has only one source file called main.cpp
> which includes standard library headers and my own headers.
>
> Can I create an universal makefile which would work with all my programs and
> which would automatically generate list of included header files and check
> them (so I'll be able no to add each new included header file manually)?

Yes. There's an example somewhere in the texinfo docs for GNU make.

How to create "universal" makefile? 

The "makedepend" program can figure out which header files your program needs. See "man makedepend". The following should come pretty close…

PROGRAM=sample

all: depend $(PROGRAM)

depend:
        makedepend main.cpp

$(PROGRAM): main.o

clean:
        rm main.o

Steve Kirkendall

How to create "universal" makefile? 

> Can I create an universal makefile which would work with all my

You don't even need a makefile. A file named main.cpp can be turned into an executable called main using the command `make main`, so when I do Computer Science projects, my makefiles usually consist of setting the compiler flags, telling make what programs are part of "all", and creating a cleanup rule.

[bloom@kabloom lab1]% ls -l
total 160
-rwxrwxr-x    1 bloom    bloom       15958 Jan 17 14:30 execer*
-rw-rw-r--    1 bloom    bloom         153 Jan 14 17:29 execer.cpp
-rw-rw-r--    1 bloom    bloom         132 Jan 22 12:08 makefile
-rwxrwxr-x    1 bloom    bloom       31697 Jan 21 17:18 myls*
-rw-rw-r--    1 bloom    bloom        2097 Jan 21 17:18 myls.cpp
-rwxrwxr-x    1 bloom    bloom       40554 Jan 21 15:34 mysh*
-rw-rw-r--    1 bloom    bloom        2149 Jan 21 15:34 mysh.cpp
-rwxrwxr-x    1 bloom    bloom       26029 Jan 17 14:30 mysplit*
-rw-rw-r--    1 bloom    bloom         920 Jan 13 12:28 mysplit.cpp
-rwxrwxr-x    1 bloom    bloom       18466 Jan 17 14:30 tester*
-rw-rw-r--    1 bloom    bloom         942 Jan 22 12:08 tester.cpp

[bloom@kabloom lab1]% cat makefile
CFLAGS=-g
CXXFLAGS=$(CFLAGS)

all: execer myls mysh mysplit tester

distclean:
        rm -f execer myls mysh mysplit tester core core.*

More information on this cool feature is available in the GNU Make texinfo manual (`info make`)

Ken Bloom

Makefile question — one comoand makes two files. 

Newsgroups:  gmane.linux.debian.user
Date:        Fri, 25 Aug 2006 15:09:17 -0400
> > Let's say that the comoand
> >    chop onion
> > makes two files, tears and pieces
> >
> > How do I describe this in a Makefile?
> In gmake this should work:
>
> tears pieces :
>      chop onion

Thanks. It works. It's the obvious way, it's in the manual, and I feel stupid for asking.

But last time I was faced with this problem, it wasn't in the manual, and this obvious method didn't work.

hendrik

[GNU Make] Generic phony rules 

Newsgroups: comp.unix.programmer
Date: 22 Mar 2007 14:50:48 GMT

I have the following make file:

 all: something else

 .PHONY: MakeAppleJuice MakeOrangeJuice MakeTomatoJuice

 MakeAppleJuice:
         make_juice Apple.in.source  Apple.in.condition

 MakeOrangeJuice:
         make_juice Orange.in.source Orange.in.condition

 MakeTomatoJuice:
         make_juice Tomato.in.source Tomato.in.condition

Is there anyway to combine the 3 rules into one? I hope there is, because the 3 rules only different in what files they use and what juices then make (but I still need the 3 phony targets). I tried the following but it didn't work:

Make%Juice: %.in.source
        make_juice $*.in.source $*.in.condition

Is it possible to have such generic phony rule?

[GNU Make] Generic phony rules 

Pattern rules and phonies don't play well. You can't have a rule like this:

.PHONY: %.o

Also, it seems when you define:

.PHONY: AppleJuice

Then make looks for an *explicit* rule to make "AppleJuice". It doesn't do the pattern rule.

Interestingly, I haven't seen this anywhere in the documentation.

> Which shouldn't be, because AppleJuice is a phony target.

Quite the opposite. In light of the above, if you remove the target from the phonies, I mean delete the .PHONY *rule* from your makefile, it works.

If you want to get the effect of .PHONY, there's another trick:

FORCE:
Make%Juice: %.in.source FORCE
        make_juice $*.in.source $*.in.condition

And your original command line works.

info make --index='force'

Jean-Rene David

[GNU Make] Generic phony rules 

> Thanks for the reply. I still can't get it working:
>
> $ cat Makefile
> make_juice := echo
>
> all: something else
>
> .PHONY: MakeAppleJuice MakeOrangeJuice MakeTomatoJuice
>
> FORCE:
> Make%Juice: %.in.source FORCE
>         make_juice $*.in.source $*.in.condition
>
> #MakeAppleJuice:
>
> $ make MakeAppleJuice
> make: Nothing to be done for `MakeAppleJuice'.

The "FORCE" trick is meant to *replace* the .PHONY rule. It's not exactly the same thing, but in your case it will allow you to do what you want with a similar overall effect (only performance is affected).

Delete the .PHONY *rule* from your makefile:

% cat Makefile
all: something else

FORCE:
Make%Juice: %.in.source FORCE
        @echo $*.in.source $*.in.condition

% ls *.in.source
Apple.in.source
Orange.in.source
Tomato.in.source

% make MakeAppleJuice
Apple.in.source Apple.in.condition

% touch MakeAppleJuice
% make MakeAppleJuice
Apple.in.source Apple.in.condition

Without "FORCE":

% cat Makefile
all: something else

Make%Juice: %.in.source
        @echo $*.in.source $*.in.condition

% touch MakeAppleJuice
% make MakeAppleJuice
make: `MakeAppleJuice' is up to date.

Jean-Rene David