		Next

Make And Variables

Table of Contents

Define variable in make-command-line

Newsgroups: gnu.utils.help,comp.unix.programmer

> Here is one of targets of my makefile :
> -------------------------
> ttt:
> ifdef AAA
>     @echo Yes
> else
>     @echo No
> endif
> -------------------------
>
> Can I define the AAA variable *when calling make*

Any variable can be set on the make command line, and that setting takes precedence over any setting in the makefile (actually, in GNU make there's a way to overcome that, but not in most makes):

$ make AAA=bbb ttt

Paul D. Smith

override variable definition

> > also possible :
> >
> > TAG=tag1 make
> > or
> > make TAG=tag1
>
>Since you brought it up...
>
>is it true that the first form can not override variable definition
>in make file whereas the 2nd can? thanks

Generally speaking, yes.

for environment variables, it depends on whether or not you use the "-e" option to make.

Ken Pizzini

make -e

-e             Environment  variables  override  assignments
               within makefiles.

Example 1. File Makefile

TAG = original

test:
        [ $${TAG} = tag1 ] && { \
          echo "action 1!"; \
          }


	!!

$ make TAG=tag1
[ ${TAG} = tag1 ] && { \
  echo "action 1!"; \
  }
action 1!

$ TAG=tag1 make
[ ${TAG} = tag1 ] && { \
  echo "action 1!"; \
  }
make: *** [test] Error 1

$ TAG=tag1 make -e
[ ${TAG} = tag1 ] && { \
  echo "action 1!"; \
  }
action 1!